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www.gennum.com gs1574 hd-linx? ii adaptive cable equalizer gs1574 data sheet 28854 - 5 may 2007 1 of 18 features ? smpte 292m, smpte 344m and smpte 259m compliant ? automatic cable equalization ? multi-standard operation from 143mb/s to 1.485gb/s ? supports dvb-asi at 270mb/s ? small footprint (4mm x 4mm) ? pb-free and rohs compliant ? pin compatible with th e gs9074 cable equalizer ? manual bypass (useful for low data rates with slow rise/fall times) ? performance optimized for 270mb/s and 1.485gb/s ? typical maximum equalized length of belden 1694a cable: 140m at 1.48 5gb/s, 350m at 270mb/s ?50 ? differential output (with internal 50 ? pull-ups) ? manual output mute or programmable mute based on max cable length adjust ? single 3.3v power supply operation ? operating temperature range: 0c to +70c applications ? smpte 292m, smpte 344m and smpte 259m coaxial cable serial digital interfaces. description the gs1574 is a second-generation high-speed bipolar integrated circuit designed to equalize and restore signals received over 75 ? co-axial cable . the gs1574 is designed to support smpte 292m, smpte 344m and smpte 259m, and is optimized for performance at 270mb/s and 1.485gb/s. the gs1574 features dc restoration to compensate for the dc content of smpte pathological test patterns. a voltage programmable mute threshold (mcladj) is included to allow muting of the gs1574 output when an approximate selected cable length is reached for smpte 259m signals. this feature allows the gs1574 to distinguish between low amplitude sd-sdi signals and noise at the input of the device. the serial digital outputs of the gs1574 may be forced to a mute state by applying a voltage to the mute pin. power consumption is typically 270mw using a 3.3v power supply. the gs1574 is lead-free, and the encapsulation compound does not contain halogenated flame retardant. this component and all homogeneous subcomponents are rohs compliant. gs1574 functional block diagram cable length adjustor carrier detect mute equalizer dc restore output agc mute sdo bypass sdo sdi sdi mcladj
gs1574 data sheet 28854 - 5 may 2007 2 of 18 contents features ....................................................................................................................... .1 applications................................................................................................................... 1 description .................................................................................................................... 1 1. pin out ..................................................................................................................... .3 1.1 gs1574 pin assignment ...... .............. .............. .............. .............. ........... ........3 1.2 gs1574 pin descriptions .. .............. .............. .............. .............. .............. ........3 2. electrical characteristics ...........................................................................................5 2.1 absolute maximum ratings ............................................................................5 2.2 dc electrical characteristics ............... ...........................................................5 2.3 ac electrical characteristics .............. .............................................................6 2.4 solder reflow profiles .....................................................................................7 3. input / output circuits ............................... ................................................................9 4. detailed description .................................. ..............................................................11 4.1 serial digital inputs .......................................................................................11 4.2 cable equalization ......... .............. .............. .............. .............. .............. .........11 4.3 programmable mute output ..........................................................................12 4.4 mute ..............................................................................................................12 5. application information............................................................................................13 5.1 pcb layout ...................................................................................................13 5.2 typical application circuit a .........................................................................13 5.3 typical application circuit b .........................................................................14 6. package & ordering information .............................................................................15 6.1 package dimensions ....................................................................................15 6.2 land information ...........................................................................................16 6.3 packaging data .............................................................................................16 6.4 marking diagram ...........................................................................................17 6.5 ordering information .....................................................................................17 7. revision history ......................................................................................................18
gs1574 data sheet 28854 - 5 may 2007 3 of 18 1. pin out 1.1 gs1574 pin assignment figure 1-1: 16-pin qfn 1.2 gs1574 pin descriptions gs1574 (top view) 1 v ee _a v ee _a sdi sdi 2 3 4 sdo sdo v ee _d v ee _d 12 11 10 9 agc agc bypass mcladj 5 7 68 v cc _a mute nc v cc _d 13 14 15 16 center pad (bottom of package, internally bonded to vee_a) table 1-1: gs1574 pin descriptions pin number name timing type description 1, 4 vee_a analog power most negative power supply for analog circuitry. connect to analog gnd. 2, 3 sdi, sdi analog input serial digital differential input. 5, 6 agc, agc analog ? external agc capacitor. connect pin 5 and pin 6 together as shown in typical application circuit a . 7 bypass not synchronous input forces the equalizing and dc re store stages into bypass mode when high. no equalization occurs in this mode. 8 mcladj analog input maximum cable length adjust. adjusts the approximate maximum amount of cable to be equalized (from 0m to the maximum cable length). the output is muted (latched to the last state) when the maxi mum cable length is achieved. note: mcladj is only recommended for data rates up to 360mb/s. for data rates above this, mcladj should be left floating. 9 vee_d analog power most negative power supply for the digital circuitry and output buffer. connect to digital gnd. 10, 11 sdo , sdo analog output equalized serial digital differential output.
gs1574 data sheet 28854 - 5 may 2007 4 of 18 12 vee_d analog power most negative power supply for the digital circuitry and output buffer. connect to digital gnd. 13 vcc_d analog power most positive power supply for the digital i/o pins of the device. connect to +3.3v dc. 14 mute not synchronous input control signal input levels are lvcmos/lvttl compatible. (3.3v tolerant) when the mute pin is set high by t he application interface, the serial digital output of the device will be forced to a steady state. when the mute pin is set low, the se rial digital output of the device will be active. 15 nc ? ? no connect. 16 vcc_a analog power most positive power supply for the analog circuitry of the device. connect to +3.3v dc. ? center pad ? power internally bonded to vee_a. table 1-1: gs1574 pin descriptions pin number name timing type description
gs1574 data sheet 28854 - 5 may 2007 5 of 18 2. electrical characteristics 2.1 absolute maximum ratings 2.2 dc electrical characteristics parameter value supply voltage -0.5v to +3.6 v dc input esd voltage (human body model) 500v storage temperature range -50c < t s < 125c input voltage range (any input) -0.3 to (v cc +0.3)v operating temperature range 0c to 70c power dissipation 300mw lead temperature (soldering, 10 sec) 260c table 2-1: dc electrical characteristics v cc = 3.3v 5%, t a = 0c to 70c, unless otherwise shown parameter symbol conditions min typ max units test levels notes supply voltage v cc ? 3.135 3.3 3.465 v ? 5% power consumption p d t a = 25c ? 265 ? mw 2 ? supply current i s t a = 25c ? 80 ? ma 1 ? output common mode voltage v cmout t a = 25c ? v cc - ? v sdo /2 ? v 7 ? input common mode voltage v cmin t a = 25c ? 1.75 ? v 8 ? floating mcladj dc voltage ?0m, t a = 25c ? 1.3 ? v 7 ? mcladj range ? t a = 25c ? 0.69 ? v 7 ? mute input voltage required to force outputs to mute v mute min to mute 3.0 ? ? v 7 ? mute input voltage required to force outputs active v mute max to activate ??2.0v7?
gs1574 data sheet 28854 - 5 may 2007 6 of 18 2.3 ac electrical characteristics table 2-2: ac electrical characteristics v cc = 3.3v 5%, t a = 0c to 70c, unless otherwise shown parameter symbol conditions min typ max units test levels notes serial input data rate dr sdo gs1574 143 ? 1485 mb/s 6 ? input voltage swing ? v sdi t a =25c, differential 720 800 950 mv p-p 21 output voltage swing ? v sdo 100 ? load, t a =25c, differential ?750?mv p-p 1? output jitter for various cable lengths and data rates ? 540mb/s belden 1694a: 0-140m belden 8281: 0-100m ?0.2? ui 8 5 ? 270mb/s belden 1694a: 0-350m ?0.2? ui 52,5 ? 270mb/s belden 8281: 0-280m ?0.2? ui 22,5 ? 1.485gb/s belden 1694a: 0-140m ?0.25? ui 5 2,5 ? 1.485gb/s belden 8281: 0-100m ?0.25? ui 2 2,5 output rise/fall time ? 20% - 80% ? 80 220 ps 1 ? mismatch in rise/fall time ? ? ? ? 30 ps 1 ? duty cycle distortion ? ? ? ? 30 ps 1 1 overshoot ? ? ? ? 10 % 7 ? input return loss ? ? 15 ? ? db 8 3 input resistance ? single ended ? 1.64 ? k ? 6? input capacitance ? single ended ? 1 ? pf 6 ? output resistance ? single ended ? 50 ? ?6 ? test levels 1. production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges. 2. production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges using correlated test. 3. production test at room temperature and nominal supply voltage. 4. qa sample test. 5. calculated result based on level 1, 2, or 3. 6. not tested. guaranteed by design simulations. 7. not tested. based on characterization of nominal parts. 8. not tested. based on existing des ign/characterization data of similar product. 9. indirect test. notes: 1. 0m cable length. 2. all parts production tested. in order to guarantee jitter over the full range of specification (v cc = 3.3v 5%, t a = 0c to 70c, and 720-880mv launch swing from the sdi cable driver) the recommended applications ci rcuit must be used. 3. tested on cb1574 board from 5mhz to 2ghz. 4. based on characterization data using the recommended applications circuit , at v cc = 3.3v, t a = 25c, and 800mv launch swing from the sdi cable driver. 5. equalizer pathological test signal is used.
gs1574 data sheet 28854 - 5 may 2007 7 of 18 2.4 solder reflow profiles the device is manufactured with matte-sn te rminations and is compatible with both standard eutectic and pb-free solder refl ow profiles. the recommended standard eutectic reflow profile is shown in figure 2-1 . msl qualification was performed using the maximum pb-free reflow profile shown in figure 2-2 . figure 2-1: standard eutect ic solder reflow profile figure 2-2: maximum pb-free solder reflow profile (pb-free package) 25?c 1 00?c 1 50?c 1 83?c 2 30?c 2 20?c tim e t emperature 6 min. max 120 sec. max 60-150 sec. 10-20 sec. 3?c/sec max 6?c/sec max 25?c 1 50?c 2 00?c 2 17?c 2 60?c 2 50?c tim e temperature 8 min. max 60-180 sec. max 60-150 sec. 20-40 sec. 3?c/sec max 6?c/sec max
gs1574 data sheet 28854 - 5 may 2007 8 of 18 figure 2-3: test circuit gigabert 1400 ext. clock clock out data out ext. clock 1.485ghz/270mhz gs1574 test board tds 820 ch. 1 ch. 2 out in out ext. trigger 50/75 8281 or 1694a cable
gs1574 data sheet 28854 - 5 may 2007 9 of 18 3. input / output circuits figure 3-1: input equivalent circuit figure 3-2: mcladj equivalent circuit figure 3-3: output circuit 3k 3.6k 3k 3.6k rc sdi sdi v cc mcladj 12.0k 150 + - 50 50 sdo sdo
gs1574 data sheet 28854 - 5 may 2007 10 of 18 figure 3-4: mute circuit figure 3-5: bypass circuit 7.5k o utput s tage mute control v cc mut e b ypass internal referenc e
gs1574 data sheet 28854 - 5 may 2007 11 of 18 4. detailed description the gs1574 is a high speed bipolar ic de signed to equalize serial digital signals. the gs1574 can equalize both hd and sd serial digital signals, and will typically equalize greater than 140m of belden 1694a cable at 1. 485gb/ s and 350m at 270mb/s. the gs1574 is powered from a single +3.3v power supply and consumes approximately 270mw of power. 4.1 serial digital inputs the serial data signal may be con nected to the input pins (sdi/sdi ) in either a differential or single ended configurat ion. ac coupling of the inputs is recommended, as the sdi and sdi inputs are internally biased at approximately 1.8v. 4.2 cable equalization the input signal passes through a variabl e gain equalizing stage whose frequency response closely matche s the inverse of the ca ble loss characteristic. the edge energy of the equalized signal is monitored by a detector circuit which produces an error signal corresponding to the difference between the desired edge energy and the actual edge energy. this error signal is integrated by both an internal and an external agc filter capa citor providing a steady control voltage for the gain stage. as the frequency response of the gain stage is automatically varied by the application of negative feedback, th e edge energy of the equalized signal is kept at a constant level which is representative of the original edge energy at the transmitter. the equalized signal is also dc restored, effectively restoring the logic threshold of the equalized signal to its correct level independent of shifts due to ac coupling. the digital output signals have a nominal voltage of 750mv pp differential, or 375mv pp single ended when terminated with 50 ? as shown in figure 4-1 .
gs1574 data sheet 28854 - 5 may 2007 12 of 18 figure 4-1: typical output voltage levels 4.3 programmable mute output for smpte 259m inputs, the gs1574 incorporates a programmable threshold output mute (mcladj). in applications where there are multiple input channels using the gs1574, it is advantageous to have a programmable mute output to avoid signal crosstalk. the output of the gs1574 can be muted w hen the input signal decreases below a certain input level. this threshold is determined using the input voltage applied to the mcladj pin. the mcladj pin may be le ft unconnected for applications where output muting is not required. this feature has been designed for use in applications such as routers where signal crosstalk and circuit noise cause the equalizer to output erroneous data when no input signal is present. the use of a carrier detect function with a fixed internal reference does not solve this problem since the signal to noise ratio on the circuit board could be significantly less than the default signal detection level set by the on chip reference. note: mcladj is only recommended for data rates up to 360mb/s. for data rates above this mcladj should be left floating. 4.4 mute in addition to the programmable mute output, the gs1574 includes a mute input pin that allows the application interface to mute the serial digital output at any time. set the mute pin high to mute sdo and sdo . 50 50 sdo sdo +187.5mv -187.5mv v cm = 2.925v typical +187.5mv -187.5mv v cm = 2.925v typical
gs1574 data sheet 28854 - 5 may 2007 13 of 18 5. application information 5.1 pcb layout special attention must be paid to component layout when designing serial digital interfaces for hdtv. an fr-4 dielectr ic can be used, however, controlled impedance transmission lines are required for pcb traces longer than approximately 1cm. note the following pcb artwork features used to optimize performance: ? pcb trace width for hd rate signals is closely matched to smt component width to minimize reflections due to change in trace impedance. ? the pcb ground plane is removed under the gs1574 input components to minimize parasitic capacitance. ? the pcb ground plane is removed under the gs1574 output components to minimize parasitic capacitance. ? high speed traces are curved to minimize impedance changes. 5.2 typical application circuit a figure 5-1: gs1574 typical application circuit gs1574 sdi nc sdi vee_d mute vcc_d agc bypass mcladj vee_a note: all resistors in ohms, capacitors in farads, and inductors in henrys, unless otherwise noted. * value dependent on layout vee_a agc vcc_a sdo sdo vee_d 10n 1 10n sdo 4u7 4u7 + + sdo mute vcc bypass mcladj + 1u 6.2n* 75 sdi 1u 75 1u 37.5 vcc_a 4 5 6 2 3 8 7 16 12 13 11 14 15 9 10
gs1574 data sheet 28854 - 5 may 2007 14 of 18 5.3 typical application circuit b this application circuit should be used for future compatibility with the gs1574a. this circuit will work with gs1574 as we ll as the gs1574a a nd is recommended for all new designs. gs1574a sdi cd sdi vee_d mute vcc_d agc bypass mcladj vee_a note: all resistors in ohms, capacitors in farads, and inductors in henrys, unless otherwise noted. * value dependent on layout vee_a agc vcc_a sdo sdo vee_d 10n 1 10n sdo 4u7 4u7 + + sdo cd mute vcc bypass mcladj 470n 6.2n* 75 sdi 1u 75 1u 37.5 vcc_a 4 5 6 2 3 8 7 16 12 13 11 14 15 9 10 470n * * value subject to change. *
gs1574 data sheet 28854 - 5 may 2007 15 of 18 6. package & ordering information 6.1 package dimensions 4.00+/-0.05 b 4.00+/-0.05 2x 2x 0.15 0.15 c c 0.10 c 16x 0.08 c seating plane 0.85+/-0.05 0.00-0.05 0.65/2 0.65 detail b scale:nts datum a or b terminal tip 0.20 ref datum b 0.65 16x 0.35+/-0.05 0.10 0.05 c a b c datum a 2.76+/-0.10 0.40+/-0.05 2.76+/-0.10 detail b center tab pin 1 area a c
gs1574 data sheet 28854 - 5 may 2007 16 of 18 6.2 land information the center pad should be connected to the most negative power supply plane for analog circuitry in the device (vee_a) by a minimum of 5 vias. note: suggested dimensions only. final dimensions should conform to customer design rules and process optimizations. 6.3 packaging data 0.35 0.55 2.76 3.70 2.76 3 .70 note: all dimensio ns are in millimeters. 0.65 center pad parameter value package type 4mm x 4mm 16-pin qfn package drawing reference jedec m0220 moisture sensitivity level 3 junction to case thermal resistance, j-c 31.0c/w junction to air thermal resistance, j-a (at zero airflow) 43.8c/w psi 11.0c/w pb-free and rohs compliant yes
gs1574 data sheet 28854 - 5 may 2007 17 of 18 6.4 marking diagram 6.5 ordering information pin 1 id gs1574 xxx xe 3 yyww yyww - date code yy - 2-digit year ww - 2-digit week number xxxx - l ot/work order id part number package temperature range GS1574-CNE3 pb-free 16-pin qfn 0c to 70c
caution electrostatic sensitive devices do not open packages or handle except at a static-free workstation gennum corporation mailing address: p.o. box 489, stn. a, burlington, ontario, canada l7r 3y3 shipping address: 970 fraser drive, burlington, ontario, canada l7l 5p5 tel. +1 (905) 632-2996 fax. +1 (905) 632-5946 gennum japan corporation shinjuku green tower building 27f, 6-14-1, nish i shinjuku, shinjuku-ku, tokyo, 160-0023 japan tel. +81 (03) 3349-5501, fax. +81 (03) 3349-5505 gennum uk limited 25 long garden walk, farnham, surrey, england gu9 7hx tel. +44 (0)1252 747 000 fax +44 (0)1252 726 523 gennum corporation assumes no liability for any errors or omissions in this document, or for the use of the circuits or devices described herein. the sale of the circuit or device described herein does not imply any patent license, and gennum makes no representation that the circuit or device is free from patent infringement. gennum and the g logo are registered trademarks of gennum corporation. ? copyright 2004 gennum corporation. all rights reserved. printed in canada. www.gennum.com gs1574 data sheet 28854 - 5 may 2007 18 18 of 18 document identification data sheet the product is in production. gennum reserves the right to make changes to the product at any time wit hout notice to improve reliability, function or design, in order to provide the best product possible. 7. revision history version ecr pcn date changes and/or modifications 0 134166 ? august 2004 upgrade to preliminary data sheet. remove all information on the gs9074. expand detailed description information. ac/dc parameters updated. add pb-free and conventional solder reflow profiles. edit pin descriptions. 1 134891 ? november 2004 added packaging data section. added pad layout information. updated packaging dimensions diagram. corrected minor typing errors. 2 135370 ? december 2004 added typical applicat ion circuit section with application information for future drop-in compatibility with gs1574a part. 3 140439 39461 may 2006 convert to data sheet. modified inductor value in application information . amended notes on mcladj above 360 mb/s. changed green references to rohs . corrected typing errors in package dimensions . 4 142113 40438 september 2006 modified format for output cable length jitter data in ac electrical characteristics . 5 145127 43739 may 2007 updated package dimensions diagram. added section 6.4 marking diagram .

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